Super junction techniques are often employed to fabricate an N-channel field effect transistor device. Such an N-channel field effect transistor device can be made whose drift region includes what is called a “charge compensation region”. The N-channel field effect transistor device is typically made to meet a particular breakdown voltage requirement. During fabrication, if the concentration of N-type dopants within the charge compensation region becomes undesirably imbalanced with respect to the concentration of P-type dopants within the charge compensation region, then the breakdown voltage requirement will not be satisfied. To maintain charge balance between the concentration of P-type dopants and N-type dopants, very tight process control is required. Fabricating the N-channel field effect transistor device to meet a particular breakdown voltage requirement requires tight process control because process variation can result in charge imbalance between the concentration of P-type dopants and N-type dopants. Usually, such charge imbalance caused by process variations occurs at the corners and edges of an active area of the device causing the formation of local low voltage areas and in a weak device. In addition, conventional super junction fabrication processes are undesirably expensive because forming P− type columns involves many delicate process steps. A solution that overcomes these shortcomings is desired.